Thesis from 2005 in the field of Computer Science - Applied Computer Science, grade: 1, University of Applied Sciences for Technology, Business and Design Konstanz, language: German. Abstract: This paper examines system-level design using Altera's high-level tool DSP-Builder. Matlab/Simulink serves as the starting point. Based on the specification of system properties in Simulink, an automated design flow is initiated down to the RTL level. The physical synthesis can then be performed using the front-end tool Quartus II. The result indicates that today's high-level synthesis tools make system design more productive and faster. Designing with such tools appears more pleasant and intuitive; however, the generated data should be re-examined. Blind trust in the results is not advisable.