The textbook "Computation Engineering" by Ganesh Gopalakrishnan offers a comprehensive analysis of the challenges and solutions in the field of verification of digital system designs. Given the increasing complexity of modern systems, the effort required for verification is becoming more significant, leading to rising costs. The book highlights the development of powerful methods based on mathematical logic and automata theory to address these challenges. It covers fundamental techniques such as equivalence checking and model checking, which allow for the verification of design behavior in temporal logic. These methods are now integrated into the tools of leading design automation providers. Additionally, the new methodology of assertion-based design is introduced, which integrates formal properties into the designs and validates them through a combination of dynamic simulation and static model checking. The book is a valuable resource for professionals and students engaged in the verification and design of hardware.